Read e-book online Analog-Baseband Architectures And Circuits For Multistandard PDF

By Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins

ISBN-10: 1402064322

ISBN-13: 9781402064326

ISBN-10: 1402064330

ISBN-13: 9781402064333

With the previous few decade efforts on lithography and integrated-circuit (IC) applied sciences, very reasonably cheap microsystems were effectively constructed for lots of diversified purposes. the fashion in instant communications is towards making a networkubiquitous period within the future years. Many remarkable possibilities and demanding situations, reminiscent of layout for multi-standardability and low-voltage (LV) compliance, are speedily changing into the mainstream instructions in wireless-IC learn and improvement, on condition that the previous can provide the simplest connectivity between varied networks, whereas the latter can facilitate the expertise migration into the sub-1-V nanoscale regimes for additional rate and gear aid.

Analog-Baseband Architecturees and Circuits presents architectural and circuit innovations for instant transceivers to accomplish multistandard and low-voltage compliance. the 1st a part of the publication stories the actual layer standards of contemporary instant conversation criteria, provides the basic tradeoffs taken with transceiver structure choice, and gives case reports of the state of the art multistandard transceivers, the place the foremost suggestions strengthened are highlighted and mentioned. A statistical precis (with a hundred+ references pointed out) of so much used transmitter and receiver architectures for contemporary communique criteria is equipped. the entire references are citied from the major boards, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005.

The moment half makes a speciality of the architectural layout of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection approach is disclosed. It, during the reconfiguration of receiver and transmitter analog basebands, permits not just a leisure of the RF frequency synthesizer’s and native oscillator’s layout standards, but in addition an effective multistandard compliance by means of synthesizing the low-IF and zero-IF within the receiver; and the direct-up and two-step-up within the transmitter. the main is validated in few layout examples. certainly one of them is a system-in-a-package (SiP) receiver analog baseband for IEEE 802.11a/b/g WLAN. It not just has the two-step channel choice embedded, but in addition incorporates a flexible-IF topology, a different 3D-stack floorplan, and a specific layout technique for prime testability and routability.

The 3rd half bargains with the circuit layout. as well as the methodical description of many LV circuit recommendations, three tailormade LV-robust practical blocks are awarded. They comprise: 1) a double-quadrature-downconversion clear out (DQDF) – it realizes simultaneously clock-rate-defined IF reception, I/Q demodulation, IF channel choice and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) – it deals a transient-free constant-bandwidth achieve adjustment. three) An inside-OpAmp dc-offset canceler – it saves the silicon quarter required for knowing a wide time consistent on chip whereas maximizing its highpass-pole switchability for speedy dc-offset transient.

The final half offers experimental result of the three tailored construction blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS strategy. formerly untold on-/off-chip co-setup for either full-chip and development blocks measurements are defined. not just the construction blocks have effectively prolonged the cutting-edge boundary when it comes to sign bandwidth and provide voltage, the analog-baseband IC has been up to now the lowest-voltage-reported answer for IEEE 802.11a/b/g WLAN receivers.

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I. Ahmed and D. Johns, “A 50MS/s (35mW) to 1kS/s (15µW) Power Scaleable 10b Pipelined ADC with Minimal Bias Current Variation,” IEEE International SolidState Circuits Conference (ISSCC), Digest of Technical Papers, pp. 280–281, Feb. 2005. B. Xia, A. Valdes-Garcia and E. Sánchez-Sinencio, “A Configurable TimeInterleaved Pipeline ADC for Multi-Standard Wireless Receivers,” in Proc. European Solid-State Circuits Conference (ESSCIRC), pp. 259–262, Sept. 2004. -I. -P. U and R. P. Martins, “Transceiver Architectural Selection: Review, State-of-the-Art Survey and Case Study,” IEEE Circuits and Systems Magazine, 2nd Issue, pp.

To meet the standard required modulation mask, techniques such as offset VCO and LOleakage calibration are somehow necessary. Again, it is noteworthy that albeit the functional blocks in RX and TX are identical, their design specifications are largely different. For instance, the RX-LPF has to feature a high out-of-band linearity due to the coexistence of adjacent channels, whereas it is not demanded from TX-LPF. Figure 2-6. 3 Two-step-up transmitter Similar to the low-IF RX, two-step-up TXs can be structured into four possible schemes as shown in Figure 2-7(a)–(d).

2004. 97] P. 11a/b/g WLANs,” in Proc. IEEE Custom Integrated-Circuit Conference (CICC), pp. 409– 412, Oct. 2004. 98] K. 11a/b/g Wireless LAN,” in Proc. European SolidState Circuits Conference (ESSCIRC), pp. 221–224, Sept. 2003. 99] T. Rühlicke, M. Zannoth and B. Klepser, “A Highly Integrated, Dual-Band, MultiMode Wireless LAN Transceiver,” in Proc. European Solid-State Circuits Conference (ESSCIRC), pp. 229–232, Sept. 2003. 100]J. , “A Fully Integrated Multi-Band MIMO WLAN Transceiver RFIC,” IEEE Symposium on VLSI Circuits (VLSI), Digest of Technical Papers, pp.

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Analog-Baseband Architectures And Circuits For Multistandard And Lowvoltage Wireless Transceivers by Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins

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