Architecture of Computing Systems – ARCS 2008: 21st - download pdf or read online

By Theo Ungerer (auth.), Uwe Brinkschulte, Theo Ungerer, Christian Hochberger, Rainer G. Spallek (eds.)

ISBN-10: 3540781528

ISBN-13: 9783540781523

This e-book constitutes the refereed court cases of the twenty first foreign convention on structure of Computing platforms, ARCS 2008, held in Dresden, Germany, in February 2008.

The 19 revised complete papers awarded including 2 keynote papers have been conscientiously reviewed and chosen from forty seven submissions. The papers disguise a large spectrum achieving from pre-fabrication variation of architectural templates to dynamic run-time model of deployed platforms with distinctive specialize in adaptivity and adaptive procedure architectures. The papers are geared up in topical sections on layout, pervasive computing, community processors and reminiscence administration, reconfigurable undefined, real-time architectures, natural computing, and computing device architecture.

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Additional resources for Architecture of Computing Systems – ARCS 2008: 21st International Conference, Dresden, Germany, February 25-28, 2008. Proceedings

Sample text

This is LRnBCC . i 2. Given are two different nodes nk and ni belonging to different biconnected component ni ∈ BCCr , nk ∈ BCCs and BCCr = BCCs . BCCr has one or more articulation points nAP ∈ BCCr . Since different biconnected components j are connected via one unique articulation point nAP j , a single resource defect leads to a situation where all tasks tx on nAP and behind this articulation j AP point are inaccessible. Thus, a failure of nj ∈ BCCr leads to a failure of all biconnected components BCCs accessible via nAP ∈ BCCr .

Definition 12 (Active Replication Constraint). The sum of computational loads cs of the tasks ts or active replicas ts executed by node ni must not exceed the capacity of ni : ts :ts →ni cs + t :t →ni cs ≤ 1 s s By Def. 5, it is trivial that Def. 12 obeys Def. 11. For the following considerations, we additionally assume that each node ni knows whether a task tx is executed by a node nj in the same biconnected component (ni , nj ∈ BCCr ) or in a different biconnected component (ni ∈ BCCr , nj ∈ BCCs with BCCr = BCCs ).

Furthermore, a new cross-over operator called area cross-over has been introduced and compared with other typical operators. This operator is particularly designed for gate matrices where two rectangular logic blocks are exchanged between the individuals. We observe that the MaxMin fitness assignment as well as the area cross-over operator considerably improve the performance of the evolutionary optimisation. 1 Introduction Two-dimensional arrays of gates are used in many devices like Field Programmable Gate Arrays (FPGA), Field Programmable Analog Arrays (FPAA) or memory chips.

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Architecture of Computing Systems – ARCS 2008: 21st International Conference, Dresden, Germany, February 25-28, 2008. Proceedings by Theo Ungerer (auth.), Uwe Brinkschulte, Theo Ungerer, Christian Hochberger, Rainer G. Spallek (eds.)


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